The present invention relates to a method for producing a pattern plate having an alignment pattern (mark) for position alignment, and in particular to a method for producing a large size pattern plate used for a reticle mask, shadow mask, etc. and for producing patterns by projecting on wafer and master mask substrate, and also to a pattern plate exposed by said method.
In recent years, ICs and LSIs have become more and more highly integrated. For example, DRAMs of 4M bits are already manufactured by mass producing, with a trend shifting now toward 16M bits and 64M bits. As the result, there are strong demands to further miniaturize wafer circuit elements. Such miniaturization is also needed in the preparation of associated patterns for the lithographic processes in order to provide the circuit elements on the wafer.
In general, three methods are known for patterning a wafer: The first method employs an EB (electron beam) system or FIB (focusing ion beam) system, and patterns are formed directly on the wafer by controlling an electron beam or ion beam. In this case the exposing position is controlled to match the pattern on the wafer, and patterning accuracy depends only on position detecting ability and exposure position control ability. However, there remain a few limitations in the ability to determine a position on a wafer and the ability to control the exposure position. Because patterns are formed one-by-one in this method it is apparent that this direct write process is time-consuming and accordingly not very suitable for mass production.
In the second method, a mask having a plurality of mask patterns is used wherein each mask pattern of the plurality is of the same size as the pattern of an associated chip to be formed on the wafer, which pattern is accordingly photolithographically transferred to a wafer substrate. This second method is suitable for mass production in that an entire exposure is performed at once for the plurality of chips. Since the plurality of patterns is transferred to the wafer 1:1, the position accuracy of the resulting pattern on the wafer is determined in accordance with the accuracy of pattern alignment. Distortion of the master mask also provides a direct influence on the accuracy.
The third method uses a mask called a reticle mask which has a pattern that is 5-10 times larger than the size of the desired circuit pattern to be produced on a wafer or a master mask. The reticle mask is exposed by reduced projection onto an appropriate wafer substrate. Because this method is based on reduced projection, positioning (overlapping) accuracy error between the pattern on a wafer and the pattern on the reticle mask is also reduced, and higher accuracy is provided. Also, this method is more advantageous than the methods by EB or FIB in production because the entire exposure is performed at once.
As described above, the progress in the technique of IC and LSI circuits toward higher integration, further necessitates higher miniaturization of wafer circuit patterns. As the result, there is a strong demand for improved alignment accuracy (positioning accuracy) between an existing pattern on a wafer and a pattern to be prepared.
Under such circumstances, in the reduced projection exposure method, which was the third pattern preparation procedure described hereinbefore as having good overlapping accuracy with a wafer pattern, there are demands that the overlapping accuracy exceed current levels (i.e. 0.04-0.02 .mu.m). In case of 16M bit DRAM fabrication, it is essential to have overlapping accuracy of 0.02-0.01 .mu.m. In this method, 10 or more reticle masks are normally needed to prepare an LSI, and it is required to have overlapping accuracy of less than 0.02-0.01 .mu.m between the patterns of the various reduced projections.
In the field of color television and displays, the products with associated shadow masks and liquid crystal panels are becoming increasingly larger in recent years. For pattern plates employed in the production of shadow masks and liquid crystal panels, there are demands not only of larger size products, but also of greater resolution (finer size). When an optical exposure system is used, wherein a series of aperture exposures provide a desired exposure pattern in combination for such shadow masks or liquid crystal panels, the number of aperture exposures required increases and the entire exposure time becomes longer accordingly, often lasting for 24 hours. Further, when an electron beam exposure system is used, a long time is required because of the number of raster scans and blankings required of a raster scanning type system for exposing a pattern of a given area; the larger the area of a pattern to be exposed, the more scan lines that are required to perform the exposure. When a vector type system is used for vector scanning of a variable shaped beam, beam scanning is performed in accordance to an aperture as in the case of the optical exposure system, and the time for exposure becomes relatively long.
When the reticle pattern is prepared by an electron beam exposure system, a raster scanning type system is normally used. With a mask substrate fixed on a stage, the stage is moved under control of a position system based on laser interferometry, and the substrate is exposed to irradiation of an electron beam, and the desired picture pattern is depicted by the exposure. The electron beam is irradiated under deflection control and is blanked and unblanked for each predetermined address on the substrate. However, to prepare a finer pattern with high precision, it is necessary to decrease the address step size, which is a unit for exposure, and the time for exposure is extensively increased.
In a vector type electron beam exposure system, desired aperture images are irradiated by the beam, and a pattern is prepared by combining such images. To prepare a finer pattern with high precision, it is necessary to decrease aperture diameter. This also means that the time required for exposure increases extensively.
As described above, when a longer time is required for exposure of a finer pattern, the following problems become important issues in a system with precision control such as an electron beam exposure system: (1) temperature changes of the substrate to be exposed; (2) electrical change; (3) mechanical change; and (4) fluctuation in the position control system. In particular, in the case of a pattern plate, such as a reticle mask, having an alignment pattern, it is necessary that positional relationship between an alignment pattern and a device pattern is precisely arranged in order to control via the alignment pattern the placement of the device pattern onto the wafer based on an accurate positional relationship between the alignment pattern and the device pattern. Such a relationship is also influenced by the above factors (1)-(4). Similarly, the pattern plates for a shadow mask and a liquid crystal panel are also influenced by the above factors (1)-(4).
In most cases, the changes and fluctuations in the above factors (1)-(4) are mono-directional. Factor (1) is considered as caused by the difference between the temperature of the substrate itself and the environmental temperature of the stage to be used. Factor (2) is caused by electrical drift, while factor (3) results mainly from gradual deviation of a cassette, which fixes the substrate to be exposed during X and Y transitions of the stage. Factor (4) is caused by changes in environmental barometric pressure and temperature affecting the interferometer. In general, most of factor (1) and a part of factors (2)-(4) are influenced by exposure size of the substrate and are approximately proportional to the dimension of the device pattern, and most of factors (2)-(4) are influenced by exposure time. In accordance with the causes and effects, the cases are divided into respective categories of positional deviation (error) proportional to depiction size and generated according to pattern size, and the positional deviation generated in proportion to exposure time. In particular, the deviation caused by factors (2)-(4) becomes an issue. If this deviation is large, it leads to an incorrect relationship between the alignment pattern and the device pattern. Generally, the positional deviation generated according to the pattern size is considered to be relatively small.